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P2020: QorIQ P2020 and P2010 Communications Processors


http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=P2020
  • Overview
  • Documentation
  • Software & Tools
  • Training & Support
  • Application Notes


The QorIQ P2 platform series, which includes the P2020 and P2010 communications processors, delivers high single-threaded performance per watt for a wide variety of applications in the networking, telecom, military and industrial markets. The series delivers dual- and single-core frequencies up to 1.2 GHz on a 45nm technology low-power platform.

The QorIQ P2 series consists of dual- and single-core products that are pin-compatible with the QorIQ P1 platform products, offering a five interchangeable cost-effective solutions. Scaling from a single core at 533 MHz (P1011) to a dual core at 1.2 GHz (P2020), the two QorIQ platforms together deliver an impressive 4.5x aggregate frequency range within the same pinout.

The devices in these two series are software compatible, sharing the e500 Power Architecture core and peripherals, as well as being fully software compatible with the existing PowerQUICC® processors. This enables you to create a product with multiple performance points from a single board design. The P2020 and P1020 processors supports symmetric and asymmetric multi-processing, enabling you to scale performance through either thread-level or application-level parallelism.

The P2020 and P2010 communications processors both have an advanced set of features for ease of use. The integrated security engine supports common security algorithms used in networking and wireless applications, such as IPSec and Kasumi. The 64b memory controller offers future-proofing against memory technology migration with support for both DDR2 and DDR3. It also supports error correction codes, a baseline requirement for any high-reliability system. Other memory types such as flash are supported through the 16b local bus, USB, SD/MMC and SPI.

The QorIQ P2 series integrates a rich set of interfaces including SerDes, Gigabit Ethernet, PCI-Express, RapidIO® technology and USB. The three 10/100/1000 Ethernet ports support advanced packet parsing, flow control and quality of service features, as well as IEEE® 1588 time-stamping. Four SerDes lanes can be portioned across two Serial RapidIO ports, three PCI Express ports and two SGMII ports.

Target Applications

The QorIQ P2 platform products serve in a wide range of applications, especially those that have tight thermal constraints. With an available junction temperature range of -40°C to 125°C, the devices can be used in power-sensitive military and industrial applications, and less-protected outdoor environments. The P2020 and P2010 enable various combinations of data plane and control plane workloads in networking and telecom applications that require higher performance but don’t want the complexity of partitioning the application across many cores. The devices’ primary target applications are networking and telecom linecards. The P2 devices, with their low power budget and high single-threaded performance, are uniquely well-suited for control plane applications. Control plane applications tend to be more sequential in nature and thus lose scaling efficiency with increasing number of threads or cores. The P2 series, with its low power, efficient dual-issue out-of-order e500 Power core and high 1.2GHz frequency, offers a level of single-threaded performance that is a perfect fit for control plane applications.

The networking linecard requires an optimal combination of good performance to manage a large amount of control plane traffic balanced against low power and cost. With convenient I/O, flexible core configurations and an on-board security block, the P2010 and P2020 are well-suited for this application, which involves controlling ASICs, managing exceptions and route table maintenance.

The P2010 and P2020 are also well-suited for LTE and WiMax channel card applications. With dual-core performance in single core power budgets, the P2 series facilitates the "flattening" of the wireless network hierarchy. The dual Serial RapidIO interfaces allow redundant backplane connections or direct connection to the DSPs (such as Freescale’s MSC8144 DSP) that implement the Layer 1 processing.

BD

Featured Documentation


  • QP20XXFS: P2010 and P2020 Single and Dual Core Communications Processors
  • P2020DS: P2020 Development System
  • P2020RDB: P2020 Reference Design Board
  • P2020FAMPECI: P2020 Family Customer Export Control Information

Featured Software & Tools


  • P2020DS: P2020 Development System
  • P2010RDB: P2020 Reference Design Board

Features


  • Dual (P2020) or single (P2010) high-performance Power Architecture e500 cores
    • 36-bit physical addressing
    • Double-precision floating-point support
    • 32 KB L1 instruction cache and 32 KB L1 data cache for each core
    • 800 MHz to 1.2 GHz clock frequency
  • 512 KB L2 cache with ECC. Also configurable as SRAM and stashing memory.
  • Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
    • TCP/IP acceleration, quality of service, and classification capabilities
    • IEEE® 1588 support
    • Lossless flow control
    • R/G/MII, R/TBI, SGMII
    • FIFO interfaces
  • High-speed interfaces supporting various multiplexing options:
    • Four SerDes to 3.125 GHz multiplexed across controllers
    • Three PCI Express interfaces
    • Two Serial RapidIO interfaces
    • Two SGMII interfaces
  • High-Speed USB controller (USB 2.0)
    • Host and device support
    • Enhanced host controller interface (EHCI)
    • ULPI interface to PHY
  • Enhanced secure digital host controller (SD/MMC)
  • Serial peripheral interface
  • Integrated security engine
    • Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi
    • XOR acceleration
  • 64-bit DDR2/DDR3 SDRAM memory controller with ECC support
  • Programmable interrupt controller (PIC) compliant with OpenPIC standard
  • Two four-channel DMA controllers
  • Two I2C controllers, DUART, timers
  • Enhanced local bus controller (eLBC)
  • 16 general-purpose I/O signals
  • Package: 689-pin temperature-enhanced plastic BGA (TEPBGA2)
  • 0C to 125C Tj -40C to 125C Tj option
QorIQ Platform
Device
Cores
Top Core Frequency
L2 Size
DDR2/DDR3
GE Ports
SERDES
PCI Express
SRIO
USB
TDM
P2
P2010
1
1200 MHz
512 KByte
64-bit
(72-bit w/ ECC)
3
4
3
2
1
N/A
P2
P2020
2
1200 MHz
512 KByte
64-bit
(72-bit w/ ECC)
3
4
3
2
1
N/A
P1
P1011
1
800 MHz
256 KByte
32-bit with ECC
3
4
2
N/A
1
Yes
P1
P1020
2
800 MHz
256 KByte
32-bit with ECC
3
4
2
N/A
1
Yes

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