The QorIQ™ P1 platform series, which includes the P1020 and P1011 communications processors, offers the value of extensive integration and extreme power smarts for a wide variety of applications in the networking, telecom, aerospace, defense and industrial markets. The series provides dual and single core solutions for the 533 MHz to 800 MHz performance range, along with advanced security and a rich set of interfaces – all delivered on 45 nm technology for a low power implementation.
The P1 platform series is perfectly suited for multiservice gateways, Ethernet switch controllers, wireless LAN access points, and high-performance general-purpose control processor applications with tight thermal constraints.
The QorIQ P1 series consists of dual- and single-core products that are pin-compatible with the QorIQ P2 platform products, offering a five-chip range of cost-effective solutions. Scaling from a single core at 533 MHz (P1011) to a dual core ate 1.2 GHz per core (P1020), the two QorIQ platforms deliver an impressive 6X aggregate frequency range.
Features
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Dual (P1020) or single (P1011) high-performance Power Architecture e500 cores
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36-bit physical addressing
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Double-precision floating-point support
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32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache for each core
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533 MHz to 800 MHz core clock frequency
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256-Kbyte L2 cache with ECC. Also configurable as SRAM and stashing memory.
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Three 10/100/1000 Mbps enhanced three speed Ethernet controllers (eTSECs)
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TCP/IP acceleration and classification capabilities
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IEEE® 1588 v2 support
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Lossless flow control
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RGMII, SGMII
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High-speed interfaces (not all available simultaneously):
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Four SerDes to 3.125 GHz multiplexed across controllers
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Two PCI Express®
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Two SGMII interfaces
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Two high-speed USB controllers (USB 2.0)
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Host and device support
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Enhanced host controller interface (EHCI)
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ULPI interface to PHY
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Enhanced secure digital host controller (SD/MMC)
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Serial peripheral interface
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Integrated security engine
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Protocol support includes SNOW, ARC4,
3DES, AES, RSA/ECC, RNG, single-pass
SSL/TLS, Kasumi -
XOR acceleration
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DDR2/DDR3 SDRAM memory controller with ECC support
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Programmable interrupt controller (PIC) compliant with Open-PIC standard
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Four-channel DMA controllers
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Two I2C controllers, DUART, timers
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Enhanced local bus controller (eLBC)
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16 general-purpose I/O signals
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Package: 689-pin wirebond power-BGA (TEPBGA2)
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