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MC68EZ328: DragonBall™ EZ Integrated Processor


http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC68EZ328&nodeId=01M934310090795
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Customer Notice

Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: i.MX Product Family, DragonBall Product Family .

The MC68EZ328 is the second member of the DragonBall™ Series of Integrated Portable System Processors.

Inheriting the display capability of the original DragonBall processor, the MC68EZ328 features a more flexible LCD controller with streamlined list of peripherals placed in a smaller package. This processor mainly targeted for portable consumer products which require less peripherals and a more flexible LCD controller. By providing 3V, fully static operation in an efficient 100 TQFP package, the MC68EZ328 delivers cost-effective performance to satisfy the extensive requirements of today's portable consumer market.

Features


  • Static 68EC000 Core Processor-Identical to MC68EC000 Microprocessor
    • Full Compatibility with MC68000 and MC68EC000
    • 32-Bit internal address bus
    • 24-Bit external address bus capable of addressing maximum 4 x 16MB blocks with chip selects CSA, CSB and 4 x 4 MB blocks with chip selects CSC, CSD.
    • 16-Bit on-chip data bus for MC68000 bus operations
    • Static design allows processor clock to be stopped to provide power savings
    • 2.7 MIPS Performance at 16.58 MHz processor clock
    • External M68000 Bus interface with selectable bus sizing for 8-bit and 16-bit data ports
  • System Integration Module (SIM28-EZ), Incorporating Many Functions Typically Related to External Array Logic, such as:
    • System configuration, programmable address mapping
    • Glueless interface to SRAM, EPROM, FLASH memory
    • 8 programmable chip selects with wait state generation logic
    • 4 programmable interrupt I/O and with keyboard interrupt capability
    • 5 general purpose, programmable edge/level/polarity interrupt IRQ
    • Other programmable I/O, multiplexed with peripheral functions up to 47 parallel I/O
    • Programmable interrupt vector response for on-chip peripheral modules
    • Low-Power mode control
  • DRAM Controller
    • Support CAS-before-RAS refresh cycles and self-refresh mode DRAM
    • Support 8 bit / 16 bit port DRAM
    • EDO or Automatic Fast Page Mode for LCDC access
    • Programmable refresh rate
    • Support up to 2 banks of DRAM/EDO DRAM
    • Programmable column address size
  • UART
    • Support IrDA physical layer protocol up to 115.2kbps
    • 8 Bytes FIFO on Tx and 12 Bytes FIFO on Rx
  • Serial Peripheral Interface Port
    • 16 bit programmable SPI to support external peripherals
    • Master mode support
  • 16-Bit General Purpose Counter / Timer
    • Automatic interrupt generation
    • 60-ns resolution at 16.58-MHz system clock
    • Timer Input/Output pin
  • Real Time Clock / Sampling Timer
    • One programmable alarm
    • Capable to count up to 512 days
    • Sampling Timer with selectable frequency (4Hz, 8Hz, 16Hz, 32Hz, 64Hz, 128Hz, 256Hz, 512Hz). Generate interrupt for digitizer sampling, or keyboard debouncing.
  • LCD Controller
    • Software programmable screen size ( up to 640*512 ) to support single (Non-Split) monochrome panels
    • Capable of direct driving popular LCD drivers/modules from Freescale, Sharp, Hitachi, Toshiba etc.
    • Support up to 4 grey levels out of 16 palettes.
    • Utilize system memory as display memory
    • LCD contrast control using 8-bit PWM
  • Pulse Width Modulation (PWM) Module
    • 8 bit resolution
    • 5 Byte FIFO provide more flexibility on performance
    • Sound and melody generation
  • Build-in Emulation Function
    • Dedicated memory space for Emulator Debug Monitor with Chip Select
    • Dedicated interrupt (Interrupt Level 7) for ICE
    • One address signal comparator and one control signal comparator with masking to support single or multiple Hardware Execution Breakpoint
    • One breakpoint instruction insertion unit
  • Boot Strap Mode Function
    • Allow User to initialize system and download program/data to system memory through UART
    • Accept execution command to run program stored in system memory
    • Provide an 8-byte long Instruction Buffer for 68000 instruction storage and execution
  • Power Management
    • Fully static HCMOS technology
    • Programmable clock synthesizer using 32.768 kHz/38.4 kHz crystal for full frequency control
    • Low power stop capabilities
    • Modules can be individually shut-down
    • Lowest power mode control
  • Operation from DC To 16.58 MHz (processor clock)
  • Operating Voltage of (3.3 +/- 10%) V
  • Compact 100-Lead Thin Quad Flat Pack (TQFP) and 144 Pin Ball Grid Array (PBGA) packages

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