The DSP56854 is a member of the DSP56800E core-based family of Digital Signal Controllers (DSCs). This device combines the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals on a single chip to create an extremely cost-effective solution. The DSP56854 includes peripherals that are especially useful for teledatacom devices; Internet appliances; portable devices; TAD; voice recognition; hands-free devices; and general purpose applications.
The DSP56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP and MCU applications. The instruction set is also highly efficient for C Compilers, enabling rapid development of optimized control applications.
View Block DiagramFeatures
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120 MIPS at 120MHz
- 16K x 16-bit Program SRAM
- 16K x 16-bit Data SRAM
- 1K x 16-bit Boot ROM
- Access up to 2M words of program or 8M data memory
- Chip Select Logic for glue-less interface to ROM and SRAM
- Six (6) independent channels of DMA
- Enhanced Synchronous Serial Interfaces (ESSI)
- Two (2) Serial Communication Interfaces (SCI)
- Serial Port Interface (SPI)
- 8-bit Parallel Host Interface
- General Purpose 16-bit Quad Timer
- JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, real-time debugging
- Computer Operating Properly (COP)/Watchdog Timer
- Time-of-Day (TOD)
- 128 LQFP package
- Up to 41 GPIO
Product Specifications
| Serial Interface - Type | SCI, SPI, SSI |
| I/O Pins | 41 |
| Additional Features | Low Voltage Detect |
