Features
- 100 percent instruction set compatible to all ColdFire family processors
- Supported by all existing ColdFire software ecosystem, including operating systems and tools
- Optimized for the Altera® Cyclone® III FPGAs, small and robust core
- SOPC Builder compatible
- $0 licensing fee and $0 royalty for the core
- Commercial support available
- Fully-synthesizable core
- Variable length RISC 16-bit, 32-bit, and 48-bit instructions
- 16 user-accessible, 32-bit wide general purpose registers
- 32-bit data bus with 24-bit address bus supporting 16 MB linear addressing
- Independent, decoupled pipelines
- 2-stage instruction fetch pipeline (IFP)
- 2-stage operand execution pipeline (OEP)
- FIFO instruction buffer provides decoupling
Block Diagram
Description
The small-footprint V1 ColdFire core is designed for entry-level 32-bit
applications. It is designed to enhance system utilization resulting in the
low-power consumption while giving more than ten times the performance of an 8-bit MCU.
The FPGA implementation of the V1 ColdFire core on the Altera Cyclone III FPGAs extends
the ColdFire advantage to a new dimension. ColdFire users can now create custom MCUs on
demand, giving them a unique way to add product differentiation. Because the V1 ColdFire
core is 100 percent instruction set compatible with other ColdFire processors, newly created
MCUs can reuse application code of its predecessors, saving development time
Free of charge, the V1 ColdFire core is licensed exclusively by IPextreme. Delivered as an
encrypted, SOPC Builder tool-compatible intellectual property (IP), the processor core can be
combined with other embedded peripherals to create custom, exact-fit MCUs, using the Altera Quartus®
II development software, including the SOPC Builder tool. The ecosystem compatible debug core ensures
that software engineers can use all the familiar standard ColdFire development tools to create
applications, including Freescale’s CodeWarrior® and IAR’s Workbench for ColdFire development tools.
The V1 ColdFire Development Kit for Altera Cyclone III FPGAs provides all the tools necessary to
design custom ColdFire solutions. For hardware engineers, the development kit provides the following:
- A processor system reference design as a SOPC Builder project
- A development board with a Cyclone III 3C25 device
- A USB-Blaster connector to connect the board to the Altera Quartus II development software
(free web edition available from www.altera.com)
For software engineers, the development kit provides a jump start to software development with
the following:
- A development board programmed with a pre-build functional processor system reference design,
including the V1 ColdFire processor core, a timer, a UART, and an Ethernet MAC implemented in an
Altera Cyclone III 3C25 device
- A Board Support Package for uC-OS/II
- A BDM connector on the board to enable JTAG debugging
Deliverables
The V1 ColdFire Development Kit for Altera Cyclone III FPGAs will include a pre-built functional
reference design with example software support. When you're ready to do your own design, a royalty
free and NRE free core can be acquired directly from IPextreme. The V1 ColdFire development kit
will be available in Q4, ’08.
Contact Information
