Multimedia Applications Processors - Power Management Unit, Arm9™ Core

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Block Diagram

i.MX233 Multimedia Applications Processor Block Diagram

i.MX233 Multimedia Applications Processor Block Diagram

Features

  • Arm926EJ-S™, 454 MHz maximum speed
  • 16 KB I/D Cache
  • Power Management Unit (PMU)
  • Mixed Signal Audio
  • LCD Controller
  • HS Device/Host + PHY
  • 3 x UART
  • 2 x SSP
  • I2C Controller
  • 6 Channel 12-bit Low Resolution ADC (LRADC)
  • Serial Audio IF x2
  • SPDIF
  • External memory interface:
    • 1.8V mDDR, DDR1 w/2.5V regulator
    • Hardware BCH (up to 20-bit correction) and RS ECC8
    • NAND Flash support for SLC/MLC and managed NAND
  • This product is included in our product longevity program, with assured supply for a minimum of 10 years after launch

Part numbers include: MCIMX233CAG4B, MCIMX233CAG4C, MCIMX233CJM4B, MCIMX233CJM4C, MCIMX233DAG4C, MCIMX233DJM4B, MCIMX233DJM4C.

Documentation

Quick reference to our documentation types.

1-5 of 20 documents

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Design Files

3 design files

Hardware

1 hardware offering

Software

1-5 of 7 software files

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 15 engineering services

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To find a complete list of our partners that support this product, please see our Partner Marketplace.

Training

2 trainings

Support

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