Power Over Ethernet

Implementing Power over Ethernet (PoE) in networking equipment will soon be possible through a single chip. PoE is defined by a standard set forth by the Institute of Electrical and Electronics Engineers (IEEE) 802.3af Task Force. PoE converges data and operating power into one LAN cable. The technology allows IP telephones, Wireless LAN access points and other enterprise terminals to safely receive power over standard Category 5 LAN cabling without modification to existing infrastructure.

The 802.3af standard defines two alternatives for power sourcing equipment (PSE): end-span and midspan. End-span refers to an Ethernet switch with embedded PoE technology. Midspan is a patch-panel resembling device, with multiple channels (typically six to 24), that is placed between any standard switch and the powered terminal. The IEEE is expected to ratify the 802.3af standard in June 2003.

PoE provides continuous service during power outages by using the same centralized, uninterrupted power supply that backs up the network. Ultimately, it enhances a customer's investment in both Category 5 infrastructure and in Ethernet switch equipment.

New, Single Chip Technology for PoE Equipment

Freescale's Semiconductor Products Sector and PowerDsine are combining their expertise to jointly develop an application-specific integrated circuit (ASIC) for the emerging Power over Ethernet market. Using the ASIC, networking equipment manufacturers can expect to be able to directly integrate power sourcing equipment (PSE) functionality.

The first 802.3af-compliant chip will be based on Freescale's SMARTMOS™ technology and PowerDsine's Power over LAN™ technology. It will integrate power, analog and logic functions into one device and will address the needs for 12, 24 and 48-output equipment. Unlike other semiconductors offered for PoE, the Freescale/PowerDsine ASIC is designed to provide power to 12 Ethernet ports (15W power per port) through one chip, thereby minimizing the number of external components and reducing overall system costs.

Freescale's SMARTMOS technology is the backbone of mixed-signal analog integrated circuits and acts as the interface between the digital environment of leading-edge microprocessors and analog, real-world interaction such as sensing, providing power or driving motion. The SMARTMOS8 process allows power, high-voltage analog and high-density digital logic functions to be manufactured on a single chip in less space than previous generations. This helps simplify system design, lower costs and improve reliability.

PowerDsine is expected to sample to customers by year-end 2003 the Freescale/PowerDsine ASIC and mid-span products using the new ASIC. Volume production is expected in early 2004. The ASIC will be fully IEEE 802.3af compliant and will work with pre-standard proprietary solutions.

For more information, please visit:   http://www.powerdsine.com/